Polysilicon evaluating method, polysilicon inspection apparatus and method for preparation of thin film transistor

ABSTRACT

The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention relates to a method for evaluating the state of apolysilicon film generated on annealing amorphous silicon, an inspectionapparatus for inspecting a polysilicon film formed on annealingamorphous silicon, and a method for preparation of a thin-filmtransistor provided with a polysilicon film generated on annealingamorphous silicon. This invention also relates to a method forpreparation of a thin-film transistor of a bottom gate structure inwhich a gate electrode is formed between a substrate and a polysiliconfilm.

[0003] 2. Description of Related Art

[0004] Recently, a thin-film transistor employing a polysilicon film asa channel layer is being put to practical use. If polysilicon is used inthe channel layer, electrical field mobility of the thin-film transistoris increased significantly. Thus, if the transistor is used as a drivingcircuit for e.g., a liquid crystal display, it is possible to realizehigh definition, high speed and a small size of the display.

[0005] Recently, the so-called low-temperature polycrystallizationprocess of heat processing amorphous silicon to form a polysilicon film,using an excimer laser annealing device, has also been developed. Byapplying the low-temperature polycrystallization process to theproduction process for the thin-film transistor, it becomes possible toreduce thermal damages to a glass substrate to enable the use of aninexpensive heat-resistant glass substrate of a large surface area.

[0006] However, with an excimer laser annealing device, used in thelow-temperature polycrystallization process, the grain size of thepolysilicon generated is varied significantly because of the unstableoutput power. So, with the polysilicon film, formed using the excimerlaser annealing device, an optimum grain size is not necessarilyproduced, thus occasionally producing rejects.

[0007] Thus, in the annealing employing this sort of the excimer laserannealing device, the state of crystals of the polysilicon film formedon the uppermost surface at a stage of completion of thepolycrystallization process for the polysilicon film is checked by100%-inspection or by random product sampling to check whether or notthe product at this state is a reject. Also, the energy informationfurnished to the polysilicon film is fed back to the excimer laserannealing device to set an optimum laser power.

[0008] However, in evaluating a polysilicon film, there is no othermethod than a sensual method of photographing a surface image using aspectroscopic ellipsometric method or a scanning type electronmicroscope to view its surface image visually to verify the crystalstate, while there lacks a method by non-contact objective check.Moreover, these methods are poor in efficiency as to time and cost andare difficult to use as an in-process method.

SUMMARY OF THE INVENTION

[0009] It is therefore an object of the present invention to enable thestate of the polysilicon film formed to be evaluated objectively,accurately and automatically in a non-contact fashion.

[0010] For accomplishing the above object, the present inventors haveconducted perseverant researches, and have found that, when an amorphoussilicon film is annealed to form a polysilicon film, there is presentedlinearity and/or periodicity in the spatial structure of the polysiliconfilm surface, depending on the energy applied to the amorphous siliconfilm during this annealing, and that evaluation of this linearity and/orperiodicity in the surface spatial structure is effective in evaluatingthe polysilicon film.

[0011] The present inventors have also found that the linearity and/orperiodicity presented in the spatial structure of the film surface ofthe polysilicon film as a result of the annealing becomes maximum when acertain pre-set energy is applied, and that adjustment or control of theenergy applied to the amorphous silicon film based on the energy whichmaximizes the linearity and/or periodicity on the spatial structure ofthe surface of the polysilicon film therefore is effective to optimizethe characteristics of the polysilicon film.

[0012] Specifically, the present inventors have found that the linearityand/or periodicity presents itself in the spatial structure of apolysilicon film surface when polysilicon film as a channel of athin-film transistor on the substrate is formed.

[0013] For example, if a thin-film transistor, whose channel is formedby polysilicon, is formed on a glass substrate, a polysilicon film isformed by forming a film of amorphous silicon and by laser annealing theresulting amorphous silicon film using excimer laser having a linearilluminating surface. In the laser annealing processing by the excimerlaser, the light beam is moved in a direction perpendicular to thelongitudinal direction of the linear illuminating surface as the hestenergy is applied to the entire glass substrate surface.

[0014] The present inventors have found that micro-irregularities areformed on the surface of the polysilicon film produced in this manner bythe excimer laser annealing, and that these micro-irregularities presentperiodicity in a direction perpendicular to the direction of the lightbeam movement.

[0015] The present inventors have found that evaluation of thislinearity and/or periodicity is effective in evaluating whether or notthe polysilicon film formed is usable as a thin-film transistor. Thepresent inventors have also found that the result of evaluation of thelinearity and/or periodicity can be effectively utilized in adjusting orcontrolling the excimer laser energy.

[0016] It is on the basis of the above information that the presentinventors have arrived at the polysilicon evaluating method and thepolysilicon inspection apparatus and method for preparation of thin filmtransistor of the present invention.

[0017] In one aspect, the present invention provides a method forevaluating a polysilicon film formed by annealing an amorphous siliconfilm, including evaluating the linearity and/or periodicity of a spatialstructure of the film surface of the polysilicon film, and evaluatingthe state of the polysilicon film based on the result of evaluation oflinearity and/or periodicity.

[0018] In this polysilicon film evaluating method, the polysilicon filmgenerated on laser annealing the amorphous silicon film is evaluated.

[0019] In another aspect, the present invention provides an apparatusfor inspecting a polysilicon film formed by annealing an amorphoussilicon film, which includes means for observing the spatial structureof the surface of the polysilicon film and means for evaluating thelinearity and/or periodicity of the spatial structure of the filmsurface of the polysilicon film acquired by the observing means toinspect the state of the polysilicon film based on the result ofevaluation of the linearity and/or periodicity.

[0020] In this polysilicon inspecting apparatus, the polysilicon filmgenerated on laser annealing the amorphous silicon film is evaluated.

[0021] In still another aspect, the present invention provides a methodfor preparation of a thin-film transistor which includes the steps offorming an amorphous silicon film, annealing the formed amorphoussilicon film to form a polysilicon film, and evaluating the linearityand/or periodicity of the spatial structure of the film surface of thepolysilicon film to evaluate the state of the polysilicon film based onthe result of evaluation of linearity and/or periodicity.

[0022] In this method for producing a thin-film transistor, thepolysilicon film generated on laser annealing the amorphous silicon filmis evaluated.

[0023] In still another aspect, the present invention provides a methodfor preparation of a thin-film transistor having a step of forming apolysilicon film serving as a channel layer by laser annealing anamorphous silicon film by an excimer laser annealing device whichincludes the steps of forming a gate electrode on a substrate, formingan amorphous silicon film on the substrate on which the gate electrodehas been formed, laser annealing the amorphous silicon films on pluralsubstrates or plural locations of the amorphous silicon film on a solesubstrate to form a polysilicon film, evaluating the linearity and/orperiodicity of a spatial structure of a surface of the polysilicon filmformed on the gate electrode on the substrate, evaluating the linearityand/or periodicity of the spatial structure of the surface of thepolysilicon film formed on locations other than the gate electrode onthe substrate, calculating the manufacturing margin of the polysiliconfilm in the laser annealing based on the linearity and/or periodicity ofthe spatial structure of the polysilicon film surface formed on the gateelectrode and on the linearity and/or periodicity of the polysiliconfilm surface formed on a location other than the gate electrode, andsetting the laser power of the excimer laser annealing device based onthe manufacturing margin.

[0024] In this method for preparation of a thin-film transistor, thepolysilicon film generated on laser annealing the amorphous silicon filmis evaluated.

[0025] In yet another aspect, the present invention provides a methodfor preparation of a thin-film transistor of a bottom gate structure inwhich a gate electrode is formed between a substrate and a polysiliconfilm which includes the steps of forming a gate electrode on thesubstrate, forming an amorphous silicon film on the substrate on whichthe gate electrode has been formed, laser annealing the amorphoussilicon film to form a polysilicon film, and checking the acceptabilityof the polysilicon film based on a spatial structure of the surface ofthe polysilicon film. The checking step includes evaluating thelinearity and/or periodicity of the spatial structure of the surface ofthe polysilicon film formed on the gate electrode of each substrate,evaluating the linearity and/or periodicity of the spatial structure ofthe surface of the polysilicon film formed on a location other than thegate electrode of each substrate, and checking the acceptability of thepolysilicon film based on the linearity and/or periodicity of thespatial structure of the surface of the polysilicon film formed on thegate electrode or on the linearity and/or periodicity of the spatialstructure of the surface of the polysilicon film formed on a locationother than the gate electrode. In this method for preparation of athin-film transistor of the bottom gate structure, the polysilicon filmgenerated on laser annealing the amorphous silicon film is evaluated.

[0026] In the polysilicon evaluating method and in the polysiliconinspection apparatus, according to the present invention, in whichlinearity and/or periodicity of the spatial structure of the polysiliconfilm formed on annealing is evaluated, polysilicon evaluation orinspection can be achieved readily non-destructively, whilst thenumerical computation is feasible without visual inspection, thusassuring automatic evaluation. Moreover, subjective evaluation can beachieved with high accuracy.

[0027] In the method for preparing a thin-film transistor, in whichlinearity and/or periodicity of the spatial structure of the polysiliconfilm, formed by annealing, is evaluated, polysilicon inspection can bemade readily non-destructively, whilst the inspection process can bebuilt into the manufacturing process. Moreover, the numericalcomputation is feasible without visual inspection, thus assuringautomatic evaluation, whilst subjective evaluation can be achieved withhigh accuracy. In addition, the results of inspection can be fed back tothe annealing process to raise the production yield of the thin-filmtransistor by this method.

BRIEF DESCRIPTION OF THE DRAWINGS

[0028]FIG. 1 illustrates a schematic cross-sectional structure of abottom gate type TFT.

[0029]FIG. 2 illustrates a cross-sectional structure of a bottom gatetype TFT following formation of a polysilicon film.

[0030]FIG. 3 illustrates the relation between the grain size of apolysilicon film and the energy furnished by excimer laser annealing.

[0031]FIG. 4 illustrates an image on the surface of a polysilicon filmwhen excimer laser annealing is performed with an optimum laser powervalue, an image on the surface of a polysilicon film when excimer laserannealing is performed with a power smaller than the optimum laser powervalue and an image on the surface of a polysilicon film when excimerlaser annealing is performed with a power larger than the optimum laserpower value.

[0032]FIG. 5 is a schematic view of a polysilicon film evaluation deviceembodying the present invention.

[0033]FIG. 6 is a flowchart for illustrating an evaluation sequence of apolysilicon film.

[0034]FIG. 7 illustrates an autocorrelation image for high periodicity.

[0035]FIG. 8 illustrates an autocorrelation image for high periodicity.

[0036]FIG. 9 is a flowchart for illustrating an evaluation sequence of apolysilicon film.

[0037]FIG. 10 illustrates an autocorrelation image for high periodicityin case of evaluation by the other polysilicon film.

[0038]FIG. 11 illustrates an autocorrelation image for low periodicityin case of evaluation by the other polysilicon film.

[0039]FIG. 12 illustrates AC values as found for a specified image.

[0040]FIG. 13 illustrates autocorrelation values for the energy appliedto a polysilicon film.

[0041]FIG. 14 illustrates AC values and the grain size for the energyapplied to the polysilicon film.

[0042]FIG. 15 illustrates AC values with respect to the laser power ofthe excimer laser in a bottom gate type TFT.

[0043]FIG. 16 illustrates typical experimental data of AC values withrespect to the laser power of the excimer laser in a bottom gate typeTFT.

[0044]FIG. 17 illustrates AC values as found based on an imagephotographed with a microscopic device employing a UV laser (DUV) ACvalues as found based on an image photographed with SEM.

[0045]FIG. 18 illustrates the structure of a specified application (EQC)of a polysilicon film evaluation device to a production process of abottom gate type TFT.

[0046]FIG. 19 illustrates the relation between the margin of preparationof the energy applied to the polysilicon film and variations in theexcimer laser power in case the laser power is set to an optimum value.

[0047]FIG. 20 illustrates the relation between the margin of preparationof the energy applied to the polysilicon film and variations in theexcimer laser power in case the laser power is not set to an optimumvalue.

[0048]FIG. 21 illustrates a typical relation between the margin ofproduction of a bottom gate type TFT and the laser power and a methodfor finding the optimum value of the laser power from this typicalrelation.

[0049]FIG. 22 illustrates another typical relation between the margin ofproduction of a bottom gate type TFT and the laser power and a methodfor finding the optimum value of the laser power from this typicalrelation.

[0050]FIG. 23 shows the structure of a specified application (IPQC) inwhich a polysilicon film evaluation device is applied to a productionprocess of the bottom gate type TFT.

[0051]FIG. 24 illustrates a method for verifying, from the AC value ofthe bottom gate type TFT whether or not the polysilicon film isacceptable.

[0052]FIG. 25 illustrates typical results of the above check on pluralLCDs formed on a glass substrate.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0053] Referring to the drawings, preferred embodiments of a polysiliconfilm evaluation device according to the present invention will beexplained in detail.

[0054] The polysilicon film evaluation device of the present embodimentis used for inspecting the polysilicon film formed in the productionprocess of a thin-film transistor having bottom gate structure (bottomgate type TFT). The bottom gate type TFT is a thin-film transistor inwhich a gate electrode, a gate insulating film and a polysilicon film(channel layer) are formed sequentially from the lower layer side one.g., a glass substrate. That is, the bottom gate type TFT is such a TFTin which a gate electrode is formed between the polysilicon film as achannel layer and a glass substrate.

Structure of Bottom Gate Type TFT

[0055] A bottom gate type TFT 1 is comprised of a glass substrate 2 onwhich are layered a gate electrode 3, a first gate insulating film 4, asecond gate insulating film 5, a polysilicon film 6, a stop 7, a firstinterlayer insulating film 8, a second interlayer insulating film 9, awiring 10, a planarizing film 11 and a transparent electricallyconductive film 12, as shown in FIG.1.

[0056] The gate electrode 3 is formed by depositing molybdenum (Mo) to athickness of 50 to 300 nm on the glass substrate 2 and by subsequentpatterning by anisotropic etching.

[0057] The first gate insulating film 4 is a silicon nitride (SiN_(x))film, e.g., 50 nm in thickness. On the glass substrate 2, carrying thisgate electrode 3, is layered silicon nitride SiN_(x).

[0058] The second gate insulating film 5 is formed e.g., of silicondioxide (SiO₂), e.g., 120 nm in thickness, this silicon dioxide (SiO₂)being layered on the first gate insulating film 4.

[0059] The polysilicon film 6 is formed e.g., of polysilicon (p-Si) 40nm in thickness. This polysilicon film 6 is layered on the second gateinsulating film 5. This polysilicon film 6 operates as a channel layerof the bottom gate type TFT 1. This polysilicon film 6 is formed onpolycrystallization by annealing amorphous silicon (a-Si) formed to athickness of 40 nm by e.g., the LPCVD method. In the polycrystallizationprocess for the polysilicon film 6, laser annealing processing employingan excimer laser as a UV laser is used. In this excimer laser annealingprocessing, a pulsed light beam having a linear irradiating surface isradiated and the amorphous silicon is polycrystallized to polysilicon asthe illumination area of the pulsed beam is moved. The illuminatingsurface of the light beam has a length in the longitudinal direction of20 cm and a length along its short side of 400 μm, with the pulsefrequency being 300 Hz. The scanning direction of the light beam inexcimer laser annealing is perpendicular to the longitudinal directionof the illuminating surface of the linear laser, that is the short sidedirection.

[0060] The polysilicon film 6 is first polycrystallized by excimer laserannealing and subsequently doped with impurity ions to form asource/drain area. This ion doping is executed after forming a stop 7 ata position where the gate electrode 3 is formed, in order to preventimpurities from being implanted on the polysilicon film 6 overlying thegate electrode 3. This stop 7 is formed of silicon dioxide (SiO₂) with afilm thickness of 200 nm and is formed using a mask used in forming thegate electrode 3.

[0061] The first interlayer insulating film 8 is formed by siliconnitride (SiN_(x)) with a film thickness e.g., of 300 nm, this siliconnitride (SiN_(x)) being layered on the polysilicon film 6.

[0062] The second interlayer insulating film 9 is formed of silicondioxide (SiO₂) with a film thickness e.g., of 150 nm, this silicondioxide (SiO₂) being layered on the first interlayer insulating film 8.

[0063] The wiring 10 is formed by depositing aluminum (Al) and titanum(Ti), after providing a contact hole for connection to a source/drainarea of the polysilicon film 6 at a location corresponding to asource/drain area of the first interlayer insulating film 8 and thesecond interlayer insulating film 9, and by patterning on etching. Thiswiring 10 interconnects the source/drain area of each transistor formedon the polysilicon film 6 to form a pre-set circuit pattern on thesubstrate.

[0064] The planarizing film (HRC) 11 is a film for planarizing thesurface of the bottom gate type TFT 1 and is formed to a film thicknessof 2 to 3 μm after depositing the wiring 10.

[0065] The transparent electrically conductive film 12 is of atransparent electrically conductive material, such as, for example, ITO,and is an electrically conductive line for interconnecting the wiring 10to an external element or wiring present externally of the bottom gatetype TFT 1. This transparent electrically conductive film 12 is formedon the planarizing film 11 after boring the contact hole in theplanarizing film 11.

[0066] In the above-described bottom gate type TFT 1, in whichpolysilicon is used for the channel layer, the electrical field mobilityof the channel field is increased appreciably. So, if the bottom gatetype TFT 1 is used as e.g., a driving circuit for the liquid crystaldisplay, it is possible to realize refinement, high speed and sizereduction of the display. Moreover, in the above-mentioned bottom gatetype TFT 1, the so-called low-temperature polycrystallization process,in which amorphous silicon is heat-treated using excimer laser annealingto form the polysilicon film 6. The result is that the thermal damage tothe glass substrate 2 in the polycrystallization process is diminishedto render possible the use of an inexpensive heat-resistant large-areaglass substrate.

Necessity of Inspection of Polysilicon Film

[0067] Meanwhile, it is said that the grain size of polysiliconrepresents a critical factor governing the electrical field mobility ofthe polysilicon film 6. The grain size depends appreciably on the energyapplied to the polysilicon film 6 at the time of excimer laserannealing. So, the laser power control and stabilization at the time ofexcimer laser annealing influence the characteristics and the yield ofproduction of the completed bottom gate type TFT 1 significantly.

[0068] However, with the excimer laser annealing device, used in theexcimer laser annealing, the radiated laser power undergoes markedoutput fluctuations. Therefore, if excimer laser annealing is performedusing the excimer laser annealing device, there results significantvariation in the energy applied to the polysilicon film 6 as compared tothe allowed energy range which yields a satisfactory grain size, that isthe manufacturing margin for the polysilicon film 6 is increased, torender stable preparation of the polysilicon film 6 difficult.

[0069] So, even if excimer laser annealing is performed under the samecondition, the grain size of the polysilicon film 6 is variedsignificantly. For example, if the laser power is increased excessively,silicon crystals are comminuted to cause so-called linear defects. Ifconversely the laser power is excessive, there result so-called writingdefects such that sufficiently large grain size is not obtained.

[0070] Moreover, in the bottom gate type TFT, in which the gateelectrode 3 is disposed as an underlying layer with respect to thepolysilicon film 6, heat dissipation on laser annealing is larger forthe polysilicon film 6 on the gate electrode 3 than that for thepolysilicon film 6 on the glass substrate 2 (on the source/drainregion). So, even if laser power applied from the excimer laserannealing device is the same, the temperature rising rate for theportion of the polysilicon film 6 lying on the gate electrode 3 differsfrom that for the portion of the polysilicon film 6 lying on the glasssubstrate 2 (on the source/grain region) thus giving rise to differentgrain size. Specifically, with the same laser power, the grain size onthe portion of the polysilicon film 6 lying on the gate electrode 3 issmaller than that on portion of the polysilicon film 6 lying on theglass substrate 2.

[0071] Thus, in the bottom gate type TFT, such an energy needs to beafforded by the excimer laser which will give a grain size optimum forboth the portion of the polysilicon film 6 lying on the glass substrate2 and the portion of the polysilicon film 6 lying on the gate electrode3, so that there results only extremely narrow production margin of thepolysilicon film 6.

[0072] However, the excimer laser annealing device used in the excimerlaser annealing as described above undergoes larger laser power outputfluctuations, so that it is difficult to control the laser power so thatthe grain size for the portion of the polysilicon film 6 lying on theglass substrate 2 and that for the portion of the polysilicon film 6lying on the gate electrode 3 will be optimum.

[0073] So, if annealing is to be performed using such excimer laserannealing device, the 100% inspection of the state of the crystals ofthe polysilicon film 6 formed on the uppermost surface of thepolysilicon film 6 is performed when the polycrystallization process ofthe polysilicon film 6 is completed, as shown for example in FIG. 2, orinspection is performed on products sampled at random, to check whetheror not the manufactured products are rejects. Alternatively, theinformation on the energy applied to the polysilicon film 6 is fed backto the excimer laser annealing device to set the laser power.

[0074] The polysilicon film evaluation device embodying the presentinvention is used for evaluating the polysilicon film at a stage whenthe polycrystallization process for the polysilicon film 6 is completed,to check whether or not the obtained product at this stage is a reject,and for feeding back the information to the excimer laser annealingdevice to set the laser energy:

Principle and Technique of Evaluation of Polysilicon Film

[0075] (1) First, the principle of evaluation of the polysilicon filmformed by the above-described excimer laser annealing is explained.

[0076] The mobility of the thin-film transistor is influencedappreciably by the polysilicon grain size, as discussed above. Forrealizing sufficient mobility, a larger polysilicon grain size ispreferred.

[0077] The grain size of the polysilicon film depends appreciably on theenergy applied in the excimer laser annealing. Referring to FIG. 3, thegrain size of the polysilicon film increases with increasing energyapplied. When reaching or exceeding a pre-set energy indicated by L inthe drawing, variation in the grain size becomes smaller and stabilized.The energy L is referred to as the minimum allowed energy. If the energyis increased further, the change in the grain size is increased, withthe polysilicon proving micro-sized grains with a certain thresholdvalue indicated H in the drawing as a boundary. This energy is referredto as the maximum allowed energy H.

[0078] So, if excimer laser annealing is to be performed, theilluminated laser power is controlled to be in a range from the minimumallowed energy L, where the grain size is becoming stabilized, up to themaximum allowed energy H directly before the grain size proves themicro-sized grains. By radiating the laser light of the laser poweraffording this range of energy to the amorphous silicon film, it ispossible to sufficiently increase the mobility of the completedthin-film transistor.

[0079] (2) Next, in the excimer laser annealing, an image on a filmsurface of the polysilicon film, with the laser power set to an optimumvalue, an image on a film surface of the polysilicon film, with thelaser power set to a value smaller than the optimum value, and an imageon a film surface of the polysilicon film, with the laser power set to avalue larger than the optimum value, are compared to one another. Figs.4A to 4C show these respective images. Specifically, FIG. 4A shows theimage on a film surface of the polysilicon film, with the laser powerset to an optimum value, FIG. 4B shows the image on a film surface ofthe polysilicon film, with the laser power set to a value smaller thanthe optimum value, and FIG. 4C shows the image on a film surface of thepolysilicon film, with the laser power set to a value larger than theoptimum value. It is noted that the images shown in FIG. 4 are thosephotographed with a microscopic device employing UV light. Thismicroscopic device will be explained in detail subsequently.

[0080] In FIG. 4, the laser scanning direction in the excimer laserannealing is the direction X in the drawing. Meanwhile, the amorphoussilicon film is irradiated with a light beam having a linear irradiatingsurface, with the laser light scanning direction being perpendicular tothe longitudinal direction of the laser beam irradiating surface.

[0081] On comparison of the image of FIG. 4B, with the laser power inthe excimer laser annealing set to the optimum value, to the images ofFIGS. 4A and 4C, the following characteristics are noticed.

[0082] First, the surface image of the polysilicon film with the laserpower set to its optimum value (FIG. 4B) exhibits linearity as comparedto the surface images of the polysilicon film with the laser power notset to its optimum value (FIGS. 4A and 4C). Specifically, the surfaceimage of FIG. 4B exhibits linearity with respect to the laser scanningdirection, indicated by X in FIG. 4. That is, the polysilicon filmsurface, with the laser power set to the optimum value, has acharacteristic linear shape exhibiting linearity in its spatialstructure.

[0083] Also, the surface image of the polysilicon film with the laserpower set to its optimum value (FIG. 4B) exhibits periodicity ascompared to the surface images of the polysilicon film with the laserpower not set to its optimum value (FIGS. 4A and 4C). Specifically, thesurface image of FIG. 4B exhibits periodicity in the directionperpendicular to the laser scanning direction (indicated by arrow Y inFIG. 4). That is, the surface image of the polysilicon film with thelaser power set to its optimum value has a characteristic linear shapeexhibiting linearity in its spatial structure.

[0084] So, the polysilicon film evaluating device embodying the presentinvention checks the polysilicon film state by exploiting theabove-described characteristics. That is, the polysilicon filmevaluating device embodying the present invention performs numericalanalysis of the surface image of the polysilicon film following excimerlaser annealing to check whether the surface spatial structure of thepolysilicon film exhibits periodicity, whether the surface spatialstructure of the polysilicon film exhibits linearity or whether thesurface spatial structure of the polysilicon film exhibits bothlinearity and periodicity, in order to inspect the state of thepolysilicon film of the bottom gate type TFT.

[0085] (3) Next, the typical technique for numerical processing in casethe photographed image of the polysilicon film exhibits linearity,periodicity or both linearity and periodicity is explained.

[0086] If the photographed image of the polysilicon film exhibiting boththe linearity and periodicity is represented schematically, it may berepresented as having numerous straight lines arranged parallel to andat an equal spacing to one another. If the photographed image of thepolysilicon film not exhibiting linearity nor periodicity is representedschematically, it may be represented as having irregular short linesappearing irregularly. For numerically representing the and evaluatinglinearity and periodicity from these images, it is sufficient if a givenimage is translated in a direction having the assumed periodicity and ina perpendicular direction thereto and correlation of the translatedimage is evaluated numerically. For example, if an image exhibitinglinearity and periodicity is translated, there is presented an imagewith a high correlation, that is with a higher rate of imagesuperposition. If conversely an image exhibiting no linearity norperiodicity is translated, there is presented no highly correlatedimage, that is, there is presented no image with a high rate of imagesuperposition, at a pre-set period.

[0087] By employing the concept of numerically representing imagecorrelation, in case the image is translated, it becomes possible tonumerically represent and evaluate the polysilicon film periodicity. Asa specified method for realizing this technique, there is such a methodof finding the autocorrelation function of an image, calculating peakand side peak values of the autocorrelation function and taking theratio of the so-calculated peak and side peak values. The peak valuesherein mean the value at the point of origin less the second smallestvalue from the point of origin in the y-direction. It is noted that thissecond smallest value is used to diminish the value of defocussing andmay be replaced by the smallest value or the third smallest value,fourth smallest value and so on, and that the side peak value is thesecond locally largest value in the y-direction from the point oforigin, excluding the point of origin, less the second locally smallestvalue in the y-direction from the point of origin.

[0088] According to the present invention, it is also possible toevaluate one of the linearity and periodicity to evaluate the state ofthe polysilicon film.

[0089] As another technique for numerical processing in case thephotographed image of the polysilicon film exhibits linearity and/orperiodicity, there is such a technique of summing the values of thetotality of pixels in the generally linear direction of a standardizedimage to find the modulation factor. There are also known a technique ofprocessing a standardized image with two-dimensional Fourier transformto find the amplitude of a certain frequency component, a technique ofextracting coordinates of extreme values (locally minimum or locallymaximum values) in an image, such as an image supposed to exhibitlinearity in the y-direction, and taking a variance in the x-directionwith respect to a coordinate in an oblong range along the y-direction inwhich the center in the x-direction is taken at the extreme value ×average coordinate value and the length in the x-direction is taken as apitch in the array in the x-direction, and a technique of extractingcoordinates of extreme values (locally minimum or maximum values) withinan image assumed to exhibit linearity in e.g., the y-direction andtaking an angle with upper and lower neighborhood points of each pointwith respect to the coordinate in an oblong range in the y-direction inwhich the center in the x-direction is taken at the extreme value ×average coordinate value and the length in the x-direction is taken as apitch in the array in the x-direction.

Specified Structure and Processing Contents of Polysilicon FilmEvaluation Apparatus

[0090] (1) The specified structure of a polysilicon film evaluationapparatus for evaluating the linearity and periodicity of the surfacespatial structure of the polysilicon film described above is hereinafterexplained.

[0091] The polysilicon film evaluating apparatus embodying the presentinvention is such a device in which a production substrate of a bottomgate type TFT, that is a substrate obtained directly after formation ofthe polysilicon film on excimer laser annealing an amorphous siliconfilm, is imaged by a microscopic device employing a UV light laser witha wavelength of 266 nm, and the state of the polysilicon film formed isevaluated from the photographing image.

[0092]FIG. 5 shows a configuration of a polysilicon film evaluationapparatus embodying the present invention.

[0093] A polysilicon film evaluation apparatus 20 shown in FIG. 5includes a movable stage 21, a UV solid laser light source 22, a CCDcamera 23, an optical fiber probe 24, a beam splitter 25, an objectivelens 26, a control computer 27 and a picture processing computer 28.

[0094] The movable stage 21 is a stage for supporting a substrate 1 onwhich has been formed a polysilicon film being inspected. This movablestage 21 has the functions of supporting the substrate 1 being inspectedand of transporting the substrate 1 being inspected to a pre-setinspection position.

[0095] Specifically, the movable stage 21 includes an X-stage, aY-stage, a Z-station and a suction plate.

[0096] The X- and Y-stages are stages movable in the horizontaldirection. By these X- and Y-stages, the substrate 1 to be inspected ismoved to a pre-set inspecting position. The Z-stage is a stage moved inthe vertical direction for adjusting the stage height. The suction plateis used for immobilizing the substrate 1 being inspected by suction.

[0097] The UV solid laser light source 22 is a UV light source with awavelength of 266 nm and uses e.g., a Nd:YAG fourth harmonics full-solidlaser. Meanwhile, a UV laser light source with a wavelength of the orderof 166 nm, recently developed, may also be employed.

[0098] The CCD camera 23, which is a camera highly sensitized withrespect to UV light and has a CCD image sensor as an internal imagingdevice, images the surface of the substrate 1 by this CCD image sensor.This CCD camera 23 has its main body portion cooled to suppress thethermal noise, readout noise or the circuit noise generated in e.g., theCCD image sensor.

[0099] The optical fiber probe 24 is a waveguide channel for the UVlaser light for guiding the UV laser light radiated from the UV solidlaser light source 22 to the beam splitter 25.

[0100] The beam splitter 25 reflects the UV laser light from the UVsolid laser light source 22 to illuminate the reflected light throughthe objective lens 26 onto the substrate 1 on the movable stage 21. Onthe other hand, the beam splitter 25 transmits the reflected from thesubstrate 1 to illuminate the transmitted light on a high sensitivitylow noise camera 3. That is, the beam splitter 25 is a laser lightseparator for separating the optical path of the optical system of thelight radiated from e.g., the UV solid laser light source 22 from theoptical path of the optical system of the reflected light to the CCDcamera 23.

[0101] The objective lens 26 is an optical component for enlarging thereflected light from the substrate 1 to detect the enlarged light. Thisobjective lens 26 has the NA of 0.9 and a wavelength of 266 nm, and iscorrected for aberration. The objective lens 26 is arranged between thebeam splitter 25 and the movable stage 21.

[0102] The control computer 27 is responsible for lighting control ofthe laser light of the UV solid laser light source 22, movement positioncontrol of the movable stage 21 and switching control of the objectivelens 26.

[0103] The picture processing computer 28 is responsible for capturingand analysis of an image of the substrate 1 photographed by the CCDimage sensor provided on the CCD camera 23 and for evaluation of thepolysilicon film formed on the substrate 1.

[0104] In the above-described evaluation apparatus 20, the UV laserlight radiated from the UV solid laser light source 22 is illuminated onthe substrate 1 through the optical fiber probe 24, beam splitter 25 andthe objective lens 26. The UV laser light radiated on the substrate 1 isreflected by the surface of the substrate 1. The reflected light fallson the CCD camera 23 through the objective lens 26 and the beam splitter25. The CCD camera 23 images the incident reflected light by the imagesensor to route the surface image information of the polysilicon film,obtained on imaging, to the picture processing computer 28.

[0105] The picture processing computer 28 evaluates the state of thepolysilicon film, based on the information on the surface image of thecaptured polysilicon film, in a manner as hereinafter explained. Basedon the result of evaluation, the picture processing computer 28 findssetting values of the laser power at the time of excimer laser annealingaimed at generating the polysilicon film, or checks whether or not thepolysilicon film formed on the substrate 1 is acceptable.

[0106] (2) The evaluation sequence of the state of the polysilicon filmby the picture processing computer 28 is hereinafter explained. Thispicture processing computer 28 finds a value obtained on numericalrepresentation of the periodicity using autocorrelation from the surfaceimage of the polysilicon film. This value is referred to below as an ACvalue. The picture processing computer 28 then evaluates the linearityand periodicity of the spatial structure of the polysilicon film surfaceto evaluate the state of the polysilicon film.

[0107] As for the evaluation sequence, a picture on the surface of thepolysilicon film is captured at step S1. The autocorrelation functionthen is calculated from the captured image at step S2. Then, a surfaceperpendicular to the arraying direction including the (0, 0) on theimage coordinate is sliced at step S3. The peak and side peak values ofthe autocorrelation function on the slicing plane were then calculatedand the ratio of the peak value and the side peak values was taken tofind the AC value at step S4. Based on this AC value, the polysiliconfilm was evaluated at step S4.

[0108] The autocorrelation function is a function shown by the followingequation:${R(\tau)}_{r}{\lim\limits_{\rightarrow\infty}{\frac{1}{T}{\int_{0}^{T}{{f(x)}{f\left( {x + \tau} \right)}{x}}}}}$

[0109] This autocorrelation function R(ô) is a function representing thecorrelation when a certain function f(x) is translated by ô in thex-direction.

[0110] This polysilicon film evaluation apparatus 20 finds theautocorrelation of the surface picture of the polysilicon film using thefollowing Winner-Hintin theorem. Here, the image informationspecifically captured is termed “iii”.

[0111] {circle over (1)} The captured image “iii” is two-dimensionalFourier transformed

:f=fourier(iii)

[0112] {circle over (2)} The Fourier series “iii” is multiplied byitself to generate a power spectrum “ps”.

:ps=|f| ²

[0113] {circle over (3)} The power spectrum “ps” is inverse Fouriertransformed to generate two-dimensional autocorrelation function “ac”.

[0114] {circle over (4)} An absolute value of the autocorrelationfunction “ac” is taken to find a real number of the autocorrelationfunction “aca”.

:aca=|ac|

[0115] If the so-generated autocorrelation function “aca” is displayedon a graph, it is a function shown in FIGS. 7 and 8. FIG. 7 shows anautocorrelation function for an image exhibiting high autocorrelation,that is a spatial structure of the polysilicon film surface exhibitinghigh periodicity and linearity. On the other hand, FIG. 8 shows anautocorrelation function for an image exhibiting low autocorrelation,that is a surface spatial structure of the polysilicon film exhibitingpoor periodicity and linearity.

[0116] The polysilicon film evaluation apparatus 20 slices a planeperpendicular to the arraying direction, that is the linearityexhibiting direction, and which comprehends coordinate values (0, 0) onan image surface, from the autocorrelation function calculated usingthis Winner-Hintin theorem, to find a function obtained on slicing. Theplane comprehending coordinate values (0, 0) on an image surface issliced to standardize the value from the autocorrelation function variedwith experimental parameters such as the volume of the illuminated lightor CCD gain.

[0117] The function obtained on this slicing is the above-mentionedautocorrelation function R(ô) in a direction perpendicular to thearraying direction.

[0118] It is also possible to carry out the steps S1 to S3 as S11 toS14.

[0119] The processing sequence for this evaluation is shown in theflowchart of FIG. 9. First, an image on the polysilicon film surface iscaptured at step s11. Then, a line of the captured image in a direction(periodicity exhibiting direction: y-direction) perpendicular to theproceeding direction of the light beam (linearity exhibiting direction:x-direction) is sliced at step S12. The autocorrelation function forthis one line is then calculated at step S13. The above-describedoperations are repeated several times, as necessary, at step S14, toeffect averaging in each line.

[0120] The autocorrelation function may be found using the Winner-Hintintheorem as follows:

[0121] {circle over (1)} The one line “1” of the captured image isFourier-transformed.

:f1=fourier(iii)

[0122] {circle over (2)} The Fourier series “f1” is multiplied by itselfto generate a power spectrum “ps1”.

:ps 1=|f1|²

[0123] {circle over (3)} The power spectrum “ps1” isinverse-Fourier-transformed to generate two-dimensional autocorrelationfunction “acd”.

:ac1=inversefourier (ps1)

[0124] {circle over (4)} An absolute value of the autocorrelationfunction “aca1”.

:aca1=|ac1|

[0125] where the image information for one actually captured line is setto “1”.

[0126] If the so-generated autocorrelation function “aca1” is displayedon a graph, it is a function shown in FIGS. 10 and 11. FIG. 10 shows anautocorrelation function for an image exhibiting high autocorrelation,that is a surface spatial structure of the polysilicon film exhibitinghigh periodicity and linearity. On the other hand, FIG. 11 shows anautocorrelation function for an image exhibiting low autocorrelation,that is a surface spatial structure of the polysilicon film exhibitingpoor periodicity and linearity.

[0127] The polysilicon film evaluation apparatus 20 then finds locallymaximum peak and side peak values from the produced function. Then, itfinds the ratio of the locally maximum value to the side peak value. Theresulting ratio is an AC value.

[0128] Therefore, if a given image has high autocorrelation, that is ifthe surface spatial structure of the polysilicon film has highperiodicity and linearity, the difference between the locally maximumpeak value and side peak value is increased, so that the AC value isincreased. If conversely the image has low autocorrelation, that is ifthe surface spatial structure of the polysilicon film has lowperiodicity and linearity, the difference between the locally maximumpeak value and side peak value is decreased, so that the AC value isdecreased.

[0129] The bottom gate type TFT 1 thus photographs the surface image ofthe polysilicon film and finds the autocorrelation function of thephotographed image to achieve numerical representation of the linearityand periodicity of the polysilicon film.

[0130] Specifically, the AC value with respect to an illustrativephotographed image is as shown in FIG. 12.

[0131] (3) The relation between the AC value obtained by the abovecalculations, the grain size of the polysilicon film and the energyapplied to the polysilicon film is hereinafter explained.

[0132] Referring to FIG. 13, the AC value is increased proportionally asfrom a time point when the energy applied to the polysilicon film byexcimer laser annealing reaches a certain energy EB1, with the AC valuebecoming maximum at a certain energy ET. The AC value is at a peak valuefor this maximum energy RT and is subsequently decreased proportionally.The AC value ceases to decrease at a certain energy EB2, with the ACvalue at this time being the minimum value. That is, the AC valueexhibits peak characteristics for a given energy value.

[0133] If such peak characteristics of the AC value are superposed ongrain size change characteristics of the polysilicon film shown in FIG.3, the result is as shown in FIG. 14. As may be seen from FIG. 14, themaximum value in the graph, representing peak characteristics of ACvalues, is comprised in an energy range in which the grain size of thepolysilicon film is optimum. Moreover, the energy E_(B1), for which theAC value begins to be increased proportionally, is lower than theallowed minimum energy L for which the grain size accorded to thepolysilicon film is optimum. On the other hand, the energy E_(B2) forwhich the proportional decrease of the AC value ceases to reach themaximum value coincides with the allowed maximum energy which is thethreshold energy value for which the crystal grains of the polysiliconfilm becomes micro-sized crystals.

[0134] So, for evaluating from the AC values having these peakcharacteristics whether or not the grain size of the polysilicon film isoptimum, it suffices to check whether or not the AC value is comprisedwithin the range indicated by a thick line in FIG. 14.

[0135] (4) If the AC value having such characteristics is evaluated tocheck whether or not the polysilicon film is acceptable, it is possibleto decide that a substrate being inspected is acceptable if the AC valueof the substrate is larger than a threshold value AC_(L) as found whenthe AC value of the substrate being inspected is larger than thethreshold value AC_(L) as found on applying the allowed minimum energyL. Moreover, even if the AC value of the substrate being inspected islower than the threshold value AC_(L), the substrate may be determinedto be acceptable if, by observing certain characteristics, the energyapplied is higher than the energy E_(T) for which the AC value ismaximum.

[0136] If the AC value having such characteristics is evaluated to setthe laser power from the excimer laser annealing device to an optimumvalue, plural substrates are laser-annealed as the laser power of theexcimer laser is changed. The AC values associated with respective laserpowers are plotted in a graph, specifically, a graph such as is shown inFIG. 13 is drawn, to find an optimum laser power from the graph.

[0137] In the bottom gate type TFT, in which the gate electrode 3 isformed below the polysilicon film 6, the polysilicon film 6 on the gateelectrode 3 is higher than the polysilicon film 6 on the glass substrate2 (on the source/drain area) in energy diffusion characteristics in caseof laser annealing. So, even if the laser power applied from the excimerlaser annealing device is the same, the energy applied to the portion ofthe polysilicon film 6 lying on the gate electrode 3 differs from thatapplied to the portion of the polysilicon film 6 lying on the glasssubstrate 2, that is on the source/drain area, with the result that thegrain size differs in the two portions.

[0138] In general, if laser annealing is made by the excimer laserannealing device, it is not possible to manage control to change thelaser power between the the portion of the polysilicon film 6 lying onthe gate electrode 3 and to the portion of the polysilicon film 6 lyingon the glass substrate 2, that is on the source/drain area, such thatexcimer laser annealing is performed evenly with the same power setting.

[0139] So, in the bottom gate type TFT, the relation between the ACvalue and the laser power of the excimer laser is as shown in FIG. 15,such that the peak value on the gate electrode, that is on thesource/drain area, is at a different position from that on the gateelectrode. Specifically, the AC value of the portion of the polysiliconfilm lying on the glass substrate, that is on the source/drain area, isat a peak at a laser power lower than that for the portion of thepolysilicon film 6 lying on the gate electrode.

[0140] Therefore, if the AC value is evaluated to make the inspection asto whether or not the polysilicon film is acceptable, and if the ACvalue is evaluated to set the laser power radiated from the excimerlaser annealing device to an optimum value, it is necessary to set thevalues of laser power which will optimize the two portions of thepolysilicon film, that is the portion lying on the glass substrate andthe portion lying on the gate electrode.

[0141]FIG. 16 shows illustrative specified experimental data of the ACvalues with respect to the laser power of the excimer laser. As may beseen from FIG. 16, the AC values are of such characteristics that thereare two different peak values, that is the peak value on the gateelectrode and the peak value on the glass substrate. From the graph ofFIG. 16, it is seen that the laser power for excimer laser annealing isoptimally set to 380 mJ.

[0142] (6) As discussed above, if, in evaluating the polysilicon filmformed on the bottom gate type TFT, the linearity and/or the periodicityof the polysilicon film surface is evaluated, polysilicon can beinspected non-destructively, such that the inspection process can bebuilt into the manufacturing process. Moreover, since the linearityand/or the periodicity is represented numerically, numericalcalculations may be used in place of visual inspection. Also, since theevaluation is by numerical representation, automatic inspection becomespossible to assure subjective inspection at a high precision. Inaddition, the result of the inspection is fed back to the annealingprocessing step to improve the production yield of the thin-filmtransistor.

[0143] In the foregoing, a microscopic device employing a UV light laseris applied as the polysilicon imaging device. However, the device forphotographing an original image usable for evaluating the linearityand/or periodicity of the polysilicon film is not limited to thismicroscopic device. For example, the linearity and/or periodicity of thesurface spatial structure of the polysilicon film may be evaluated basedon the picture as observed by SEM. For example, comparison ofcharacteristics obtained when finding the AC value based on an imagephotographed by a microscopic device employing the UV laser light (DUV)to those obtained in finding the AC value based on the imagephotographed by SEM, reveals that, although an image with higherdefinition is obtained with the SEM and hence the AC value is relativelylow in this case, the curves representing the characteristics aresubstantially the same.

[0144] Although the embodiment of using the autocorrelation function hasbeen explained as a technique for numerical representation of thelinearity and/or periodicity, the technique for numerical representationis also not limited to the embodiment of using the autocorrelationfunction.

Specified Application in Manufacturing Process of Bottom Gate Type TFT 1

[0145] In the following, an illustrative application of the polysiliconfilm evaluation apparatus 20 to the manufacturing process for the bottomgate type TFT is hereinafter explained.

[0146] First, an illustrative application of evaluating the AC valueobtained from an imaging surface of the polysilicon film of the bottomgate type TFT shown in FIG. 18 and feeding back the results of theevaluation to the lead to set the laser power from this excimer laserannealing device 30 to an optimum value (EQC; equipment quality control)is explained.

[0147] In the excimer laser annealing device, the output value of theactual laser power undergoes fluctuations with respect to the laserpower setting value, as discussed above. The output laser power showsGaussian characteristics of distribution such that certain fluctuationsare produced with respect to the pre-set power setting. On the otherhand, in the case of the bottom gate type TFT, the manufacturing marginof the energy afforded to the polysilicon film, that is an energy rangeoutside which the product is a reject, is of a large value relative tothe fluctuations.

[0148] So, if the center position of the manufacturing margin of thepolysilicon film is an optimum value of the laser power setting, and thelaser power is set to this optimum value, the energy afforded to thepolysilicon film is within the manufacturing margin even if the laserpower is fluctuated, thus giving a high production yield. However, ifthe laser power setting is not to an optimum setting of themanufacturing margin, the energy afforded to the polysilicon film issometimes off the manufacturing margin, thus lowering the productionyield.

[0149] Therefore, in the present embodiment, the laser power of theexcimer laser annealing device is set to an optimum value by exploitingpeak properties of the AC value of the bottom gate type TFT as follows:

[0150] First, in the present embodiment, plural substrates, eachcarrying a polysilicon film, are produced. In this case, the setting ofthe laser power of the excimer laser annealing device is changed fromsubstrate to substrate and an AC value on the gate electrode and that onthe glass substrate are found for each substrate.

[0151] Then, AC value peaks, as shown in FIGS. 21 and 22, are drawn ongraphs.

[0152] If the AC peak value curves are drawn as described above, it ispossible to find the allowable ranges of the laser power (manufacturingmargin of the polysilicon film) which will give an optimum grain sizefor both the portions of the polysilicon film lying on the gateelectrode and on the glass substrate. Specifically, the laser power onthe lower limit threshold of the manufacturing margin is the laser powercorresponding to the minimum allowed energy (L) afforded to thepolysilicon film on the gate electrode, specifically, the laser power onthe left end of the AC value portion drawn with a thick line on the gateelectrode indicated in FIGS. 21 and 22 (MO(L)). On the other hand, thethe laser power on the upper limit threshold of the manufacturing marginis the laser power corresponding to the maximum allowed energy (H)afforded to the polysilicon film on the gate electrode, specifically,the laser power on the right end of the AC value portion drawn with athick line on the glass substrate indicated in FIGS. 21 and 22 (G(H)).

[0153] A median value of the manufacturing margin, thus found, is found,and the laser power for this median value is set as an optimum value.

[0154] The AC value is found as described above to find themanufacturing margin, which is then set as an optimum value to increasethe yield of the bottom gate type TFT.

[0155] An illustrative application in which the AC value obtained fromthe photographed image of the polysilicon film of the bottom gate typeTFT, manufactured by the excimer laser annealing device 30, as shown inFIG. 23, is evaluated, and the result of evaluation is used in givingthe decision of the acceptability of the polysilicon film (IPOC,In-Process Quality Control), is hereinafter explained.

[0156] In the excimer laser annealing device, the output value of theactual laser power undergoes larger fluctuations with respect to thelaser power setting, as discussed above. So, with the polysilicon filmevaluation apparatus 20, the decision as to acceptability is given onthe basis of 100% or approximately 100% inspection so as not to transferthe flaw in the excimer laser annealing process to subsequent processes.

[0157] Specifically, the polysilicon film evaluation apparatus 20 givesthe decision as to acceptability as follows:

[0158] In the bottom gate type TFT, acceptability may be achieved incase laser annealing is performed in a range from the allowed minimumenergy L of the energy applied to the portion of the polysilicon filmlying on the gate electrode to the laser power corresponding to theallowed maximum energy H applied to the portion of the polysilicon filmlying on the glass substrate. Specifically, this range begins at thelaser power at the left end of the AC value curve on the gate electrodedrawn with a thick line and terminates at the laser power at the rightend of the AC value curve on the glass substrate drawn with a thickline. That is, if the polysilicon film is annealed with the laser powercomprised in the ranges {circle over (3)} and {circle over (4)} in FIG.24, the polysilicon film is acceptable.

[0159] So, the polysilicon film evaluation apparatus 20 first finds theAC value on the portion of the polysilicon film lying on the gateelectrode. The polysilicon film evaluation apparatus 20 then checkswhether or not this AC value is larger than the threshold valueAC_(L)(MO) as found when the allowed minimum energy L is applied to thepolysilicon film. If the AC value is larger than the threshold valueAC_(L)(Mo), the laser power is within the range {circle over (3)} inFIG. 24, and hence the polysilicon film is verified to be acceptable.

[0160] If the AC value is smaller than the threshold value AC_(L), thefollowing decision is given. The autocorrelation value when thepolysilicon film portion on the gate electrode is annealed with thelaser power corresponding to the allowed maximum energy H afforded tothe polysilicon film on the glass substrate is set as being thethreshold value AC_(B). It is then checked whether or not the AC valueof the polysilicon film portion lying on the gate electrode is within arange from threshold value AC_(L) to threshold value AC_(B) and alsowhether or not the AC value of the polysilicon film portion lying on theglass substrate is lower than the threshold value AC_(B). If thiscondition is met, the laser power is within the range {circle over (4)}in FIG. 24 and hence the polysilicon film is verified to be acceptable.If the above condition is not met, the laser power is within the rangesof {circle over (1)}, {circle over (2)} and {circle over (5)} in FIG. 24and hence the polysilicon film is verified to be a reject.

[0161] By finding the AC value of the polysilicon film portions lying onthe gate electrode and on the glass substrate, it is possible to checkthe acceptability of the polysilicon film by exploiting the different incharacteristics of the autocorrelation value of the polysilicon filmportions lying on the gate electrode and on the glass substrate, therebyrelieving the load imposed on the processing downstream of the laserannealing step.

[0162] Even if plural LCDs are formed on a sole glass substrate, asshown in FIGS. 25A and 25B, the reject positions can be located bycarrying out 100%-inspection on the LCDs, even on the occasion ofoccurrence of partial flaws, thereby relieving the load otherwiseimposed on the downstream side processing.

What is claimed is:
 1. A method for evaluating a polysilicon film formedby annealing an amorphous silicon film, comprising: evaluating thelinearity and/or periodicity of a spatial structure of the film surfaceof the polysilicon film; and evaluating the state of the polysiliconfilm based on the result of evaluation of linearity and/or periodicity.2. The method for evaluating the polysilicon film according to claim 1wherein the polysilicon film generated on laser annealing the amorphoussilicon film is evaluated.
 3. The method for evaluating the polysiliconfilm according to claim 2 wherein the polysilicon film generated onlaser annealing the amorphous silicon film with a light beam having alinear irradiating surface is evaluated.
 4. The method for evaluatingthe polysilicon film according to claim 3 wherein the polysilicon filmgenerated on excimer laser annealing the amorphous silicon film isevaluated.
 5. The method for evaluating the polysilicon film accordingto claim 1 wherein an image on the film surface of said polysilicon filmis photographed and linearity and/or periodicity of a spatial structureof the film surface is evaluated from the autocorrelation of said image.6. The method for evaluating the polysilicon film according to claim 1wherein the UV laser is illuminated on said polysilicon film tophotograph an image of said polysilicon film and evaluation is made ofthe linearity and/or periodicity of the spatial structure of thephotographed surface image of the polysilicon film.
 7. An apparatus forinspecting a polysilicon film formed by annealing an amorphous siliconfilm, comprising: means for observing the spatial structure of thesurface of said polysilicon film; and means for evaluating the linearityand/or periodicity of the spatial structure of the film surface of saidpolysilicon film acquired by said observing means to inspect the stateof said polysilicon film based on the result of evaluation of saidlinearity and/or periodicity.
 8. The inspection apparatus according toclaim 7 wherein said inspection means evaluates the linearity and/orperiodicity of the spatial structure of the film surface of thepolysilicon film generated on laser annealing the amorphous siliconfilm.
 9. The inspection apparatus according to claim 8 wherein saidinspection means evaluates the linearity and/or periodicity of thespatial structure of the film surface of the polysilicon film generatedon laser annealing the amorphous silicon film with a laser beam having alinear irradiating surface.
 10. The inspection apparatus according toclaim 9 wherein said inspection means evaluates the polysilicon filmformed by excimer laser annealing processing performed on said amorphoussilicon film.
 11. The inspection apparatus according to claim 7 whereinsaid observing means photographs an image on the film surface of saidpolysilicon film; and wherein said inspection means evaluates thelinearity and/or periodicity of the spatial structure of the filmsurface from the autocorrelation of the image on the film surface ofsaid polysilicon film photographed by said observing means.
 12. Theinspection apparatus according to claim 7 wherein said observing meansilluminates UV laser on said polysilicon film to observe the surfaceimage of said polysilicon film.
 13. A method for preparation of athin-film transistor, comprising the steps of: forming an amorphoussilicon film; annealing the formed amorphous silicon film to form apolysilicon film; and evaluating the linearity and/or periodicity of thespatial structure of the film surface of the polysilicon film toevaluate the state of the polysilicon film based on the result ofevaluation of linearity and/or periodicity.
 14. The method forpreparation of the thin-film transistor according to claim 13 wherein,in said polysilicon film forming step, the amorphous silicon film islaser-annealed to form a polysilicon film.
 15. The method forpreparation of the thin-film transistor according to claim 14 wherein,in said polysilicon film forming step, the polysilicon film is formed bylaser annealing said amorphous silicon film with a light beam having alinear irradiating surface.
 16. The method for preparation of thethin-film transistor according to claim 15 wherein, in said polysiliconfilm forming step, the polysilicon film is formed by excimer laserannealing on an amorphous silicon film.
 17. The method for preparationof the thin-film transistor according to claim 13 wherein, in saidevaluating step, the surface image of the polysilicon film isphotographed and the autocorrelation of the surface image is found toevaluate the linearity and/or periodicity of the spatial structure ofthe film surface.
 18. The method for preparation of the thin-filmtransistor according to claim 13 wherein, in said evaluating step, theUV laser is illuminated on said polysilicon film to photograph a surfaceimage of said polysilicon film to perform evaluation based on thephotographed surface image.
 19. The method for preparation of thethin-film transistor according to claim 13 wherein, in said polysiliconfilm forming step, the energy applied to said amorphous silicon film insaid annealing is controlled depending on the results of evaluation insaid evaluation step.
 20. A method for preparation of a thin-filmtransistor having a step of forming a polysilicon film serving as achannel layer by laser annealing an amorphous silicon film by an excimerlaser annealing device, comprising the steps of: forming a gateelectrode on a substrate; forming an amorphous silicon film on thesubstrate on which said gate electrode has been formed; laser annealingsaid amorphous silicon films on plural substrates or plural locations ofsaid amorphous silicon film on a sole substrate to form a polysiliconfilm; evaluating the linearity and/or periodicity of a spatial structureof a surface of said polysilicon film formed on the gate electrode onsaid substrate; evaluating the linearity and/or periodicity of thespatial structure of the surface of said polysilicon film formed onlocations other than the gate electrode on said substrate; calculatingthe manufacturing margin of said polysilicon film in the laser annealingbased on the linearity and/or periodicity of said spatial structure ofthe polysilicon film surface formed on said gate electrode and on thelinearity and/or periodicity of the polysilicon film surface formed on alocation other than said gate electrode; and setting the laser power ofsaid excimer laser annealing device based on said manufacturing margin.21. A method for preparation of a thin-film transistor of a bottom gatestructure in which a gate electrode is formed between a substrate and apolysilicon film, comprising the steps of: forming a gate electrode onsaid substrate; forming an amorphous silicon film on said substrate onwhich said gate electrode has been formed; laser annealing saidamorphous silicon film to form a polysilicon film; and checking theacceptability of said polysilicon film based on a spatial structure ofthe surface of said polysilicon film; said checking step comprising:evaluating the linearity and/or periodicity of the spatial structure ofthe surface of said polysilicon film formed on said gate electrode ofeach substrate; evaluating the linearity and/or periodicity of thespatial structure of the surface of said polysilicon film formed on alocation other than said gate electrode of each substrate; and checkingthe acceptability of said polysilicon film based on the linearity and/orperiodicity of the spatial structure of the surface of said polysiliconfilm formed on said gate electrode or on the linearity and/orperiodicity of the spatial structure of the surface of said polysiliconfilm formed on a location other than said gate electrode.